(1) Field of the Invention
The invention relates to the fabrication of integrated circuit devices, and more particularly, to a method for the creation of a CMOS compatible suspended inductor.
(2) Description of the Prior Art
Integrated Circuit (IC) devices are typically formed over the surface of a semiconductor substrate, electrical circuit elements of the individual IC devices are connected internally to the semiconductor surface on which the IC devices are formed. IC devices that are formed in or on the surface of a substrate are typically active digital processing devices or, less typically, analog processing devices. In addition, discrete passive components can be formed that function with created active semiconductor devices, these discrete passive components are preferably formed using existing semiconductor device technology techniques and equipment.
Semiconductor device performance improvements are largely achieved by reducing device dimensions. This trend of device miniaturization has progressed to where modern day devices are created with sub-micron and deep sub-micron device feature size. While this process has been a continuing trend for active semiconductor devices it has placed increased emphasis on miniaturization of discrete passive components, such as inductors, that are required to function with the miniaturized active devices. To accommodate the requirements that arise from the continuing reductions of the dimensions of discrete passive components, the methods used and the design of passive components continue to be modified and adapted while concurrently materials and their application are explored that provide improved performance of the discrete components.
Typical application for the inductor of the invention is in the field of modern mobile communication applications that make use of compact high-frequency equipment. This equipment has over the years continually improved in its performance characteristics, further improvements place continued emphasis on lowering the power consumption of the equipment, on reducing the size of the equipment, on increasing the operational frequency of the applications and on creating low noise levels. One of the main applications of semiconductor devices in the field of mobile communication is the creation of Radio Frequency (RF) amplifiers. RF amplifiers contain a number of standard components whereby however a major component of a typical RF amplifier is a tuned circuit that contains inductive and capacitive components. One of the problems that is encountered when creating an inductor on the surface of a semiconductor substrate is that the self-resonance that is caused by the parasitic capacitance between the (spiral) inductor and the underlying substrate will limit the use of the inductor at high frequencies. As part of the design of such an inductor it is therefore of importance to reduce the capacitive coupling between the created inductor and the underlying substrate.
The invention addresses the creation of a high-Q on-chip inductor with the objective of improving the performance characteristics of a conventionally created on-chip spiral inductor. The suspended inductor of the invention uses an air-gap and is supported by a set of novel metal pillars, in this manner suppressing the parasitic capacitance experienced between the metal layer of the inductor and the underlying substrate. The quality factor of the created inductor of the invention is improved from a Q-value of a conventional inductor of 4.8 to a value of 6.3 for the inductor of the invention. In addition, the frequency at which this Q maximum value of the inductor can be achieved has been increased from 1.5 GHz to 2.0 GHz.
U.S. Pat. No. 6,140,197 (Chu et al.) shows an inductor design with air gaps in the dielectric layer under the inductor.
U.S. Pat. No. 6,211,056 B1 (Begley et al.) shows an air bridge under an inductor.
U.S. Pat. No. 5,798,557 (Salatino et al.) shows suspended conductors.
U.S. Pat. No. 6,274,920 B1 (Park et al.), U.S. Pat. No. 6,249,206 B1 (Uchikoba et al.), U.S. Pat. No. 6,180,995 B1 (Herbert) and U.S. Pat. No. 6,258,652 B2 (Stacey) are related inductor and air gap patents.
T. Ueda, E. Tamaoka, K. Yamashita, N. Aoi and S. Mayumi: ‘A Novel Air Gap Integration Scheme for Multi-level Interconnects using Self-aligned Via Plugs’, Symposium on VLSI Tech. Dig. of Tech. Papers, p. 46-47, 1998.
Ali M. Niknejad, and Robert G Meyer: ‘Analysis, Design, and Optimization of Spiral Inductors and Transformers for Si RF IC's’, IEEE Journal of Solid-State Circuits, Vol. 33, No. 10, October 1998, p. 1470.
Kirk B. Ashby, A. Koullias, William C. Finley, John J. Bastek, and Moinian: ‘High Q Inductors for Wireless Applications in a Complementary Silicon Bipolar Process’, IEEE Journal of Solid-State Circuits, Vol. 31, No. 1, January 1996, p. 4.
Min Park, Seonghearn Lee, Cheon Soo Kim, Hyun Kyu Yu, and Kee Soo Nam: ‘The Detailed Analysis of High CMOS-Compatible Microwave Spiral Inductors in Silicon Technology’, IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 45, NO. 9, SEPTEMBER 1998.